Related: [[6400 CRT scan modes]], [[6320F Video Signals]] ## FIS ![[Screen Shot 2022-12-28 at 6.53.01 PM.jpg|grid]] ![[Screen Shot 2022-12-28 at 6.53.31 PM.jpg|grid]] Can store a 1024x1024 image in [[NTSC]] format ## Function of each board in FIS unit ### FIS(1) PB 1. Frame buffer 512 x 512 x 16 x 2 bit 2. A/D converters (for TV/SR and for SLOW/PHOTO) 3. Frame accumulator 4. Pixel accumulator 5. Lookup table 6. SYNC Generator for TV (EIA or CCIR) and SR ### FIS(2) PB 1. Frame memory (1M Byte x 4,4 frames) 2. Interpolation arithmetic circuit 3. [[DRAM]] cycle arbiter (DRAM timing generator) 4. DRAM count controller, [[DMA]] address counter 5. DMA address arithmetic circuit ### FIS(3) PB 1. Graphics display - TV bit-mapped display - For 2nd display - TV character display - For 2nd display - [[EOS]] bit-mapped display - For 1st display 2. [[SCSI]] bus interface ### MPU PB 1. 8086 CPU 2. ROM, ROM, battery backed up RAM (64kByte) 3. Interruption controller 4. Serial interface, 2 channels 5. Timer